Re: [Jack-Devel] netjack1 / netjack2

Hi Robin,
mine is all in verilog, I despise VHDL. (I'm not sure why, but it makes 
my skin crawl)

Anyway, sure a core would be nice, but what I have is very specific to 
the system I put in place. Its nowhere near ready to be a general 
purpose core and I don't have anywhere near enough time to make it so.

I'm currently implementing a different audio network protocol in an 
FPGA, and someone is actually paying me to do so, its going to take 
precedence right now!

John S.

On 10/12/2011 7:59 AM, Robin Gareus wrote:
> On 10/05/2011 03:50 PM, John Swenson wrote:
>> Hi Tobias,
>> I actually did this a while back. I used netjack2 implemented in an
>> FPGA.
>
> Hi John,
>
> Is the VHDL (or Verilog or..) available under a libre license? It'd be
> great to have an netjack core at http://opencores.org/ , would it not?
>
> robin
>
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