Re: [Jack-Devel] netjack1 / netjack2

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DateSun, 09 Oct 2011 15:34:51 -0700
From John Swenson <[hidden] at comcast dot net>
ToTobias Hoffmann <[hidden] at thax dot hardliners dot org>
Cc[hidden] at lists dot jackaudio dot org
In-Reply-ToTobias Hoffmann Re: [Jack-Devel] netjack1 / netjack2
Hi Tobias,
Yes, fragmentation has to be handled in the FPGA. I didn't use a soft 
processor at all, everything was coded as state machines in the FPGA. I 
was only doing 2 channels, but there is no reason why it couldn't run 
considerably more than that.

John S.


On 10/7/2011 4:10 PM, Tobias Hoffmann wrote:
> John Swenson wrote:
>> I actually did this a while back. I used netjack2 implemented in an
>> FPGA. I used a wiznet ethernet chip to deal with the low level
>> protocol stuff, the only thing it doesn't do is DHCP, so I just used
>> static IP to make it easier. I did implement the master in the FPGA.
>> For details I just read the source code and figured out what parts of
>> it I wanted to implement.
> So did you handle the reordering und defragmentation of the UDP packets
> in the FPGA hardware?
> I would assume that a Soft-CPU is too slow for more than a few channels?
> What period sizes (e.g. at 48k sample rate) did you use / are reasonably
> usable in your implementation?
>> If you are just building a simple one to one system you can leave out
>> a LOT of the jack stuff itself and just implement the netjack
>> protocol. One advantage of doing the master is that you can set the
>> sample rate to what you want and build a low jitter oscillator for
>> that frequency. Of course its best if that is the same frequency used
>> by whatever is the slave.
> I've first looked at netjack1([1]), as one of my computers currenty has
> only jack1installed. From a protocol perspective implementing Slave or
> Master is equally difficult (or simple).
>
> Tobias
>
> [1] http://thax.hardliners.org/netjack1.html my (very) rough netjack1
> protocol format description
>
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