Re: [LAD] [Jack-Devel] How is the TSC calibration accuracy on dual core 2 computers? (And what about HPET?)

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DateTue, 28 Apr 2009 23:25:58 +0300
From Jussi Laako <[hidden] at sonarnerd dot net>
To"Kjetil S. Matheussen" <[hidden] at notam02 dot no>
Cc[hidden] at lists dot jackaudio dot org, [hidden] at lists dot linuxaudio dot org
In-Reply-ToKjetil S. Matheussen Re: [LAD] How is the TSC calibration accuracy on dual core 2 computers? (And what about HPET?) 
Kjetil S. Matheussen wrote:
> Paul Davis wrote:
>> the cycle counter on intel systems is (was?) guaranteed to run exactly
>> in sync. AMD had a problem a few generations back where they neglected
>> to provide this feature and it caused havoc for several different
>> categories of users. they corrected their error very quickly and i
>> believe that all their chipsets will now also always have precisely
>> A synced cycle counter.
> 
> Thanks.

I would just warn that, AFAIK, on some CPUs frequency scaling affects
TSC while not on some others... And the frequency of CPU clock is not
necessarily very precise and can vary depending on hardware/temperature/etc.

Some hardwares may employ spread spectrum on the clock - ie. generating
jitter on the clock to lower EMI.

Best option for timing is usually to use hardware intended for timing.
Kernel can use HPET as clock source with "clocksource=hpet" parameter.


	- Jussi
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